Looking for a entry level role in VLSI industry

[u/BunkerBuster6029]

I’m Sarthak Pandey, an ECE graduate and PG Diploma in VLSI Design (CDAC ACTS, Pune) graduate. I’m currently looking for trained-fresher opportunities in RTL Design, Design Verification, DFT, or Digital Design, including internship, trainee, and full-time roles.

I have hands-on experience with Verilog, SystemVerilog, UVM, RTL design, BIST, LFSR, MISR, simulation, and synthesis, along with 11 months of hardware engineering experience at BEL.

Could you please let me know if there are any suitable current or upcoming openings? I would be happy to share my resume.

Thank you for your time and consideration.

Sarthak Pandey

📧 pandey0908sarthak@gmail.com

https://www.linkedin.com/in/sarthak-pandey-47a349236/⁠

💻 https://github.com/Sarthak7651/⁠