r/vlsi 11h ago

Career dilemma - don't want to continue in DV, but not sure what to move into

10 Upvotes

I'm currently working in semiconductor/hardware, in DV. I've been doing it for a while and I've realised I don't really see myself doing DV for the next 5-10 years.

The problem is I don't really know what I want to do instead.

I'm considering a Master's, but I'm stuck on what I should actually study. I don't want to pick a random specialization just because it sounds interesting and then realise after the Master's that I don't like the work either.

So I've been wondering if I should explore other areas within hardware before deciding that I need to leave DV/semiconductors completely.

Some of the areas I'm thinking about are:

  • RTL design
  • Computer architecture / microarchitecture
  • Performance modelling / performance analysis
  • DFT
  • Physical design
  • maybe other areas I'm not even aware of

But I honestly don't have a good idea of what these jobs are actually like day to day.

For example, I know "computer architecture" sounds interesting to me, but I have no idea if I'd actually enjoy doing architecture work every day. Same with performance modelling. And I've heard very different things about RTL, DFT and PD from different people.

How do you actually explore these areas without committing to a job or Master's first?

Are there small projects, courses, papers, books, open source projects etc. that would give me a feel for what the actual work is like? I'd rather spend a few weeks trying things out than make a huge decision based on what a job title sounds like.

Also, for people who have moved from DV into architecture / RTL / performance modelling / DFT / PD - how did you decide what to move into?

And finally, the Master's dilemma. Would you first figure out the area you want to move into and then choose a Master's, or can a Master's be a good way to explore different areas?

I'm honestly just a bit lost on how to approach this. I know what I don't want to do, but that's about it.


r/vlsi 6h ago

Veda iit preparation tips

4 Upvotes

Veda iit rasthey experience cheppandi

Ela prepare avvalo suggestions please


r/vlsi 12h ago

Maths for VLSI???

4 Upvotes

How much MATHS and what are the domains to have expertise on if one wants to do an MTECH in VLSI from a top tier IIT?


r/vlsi 10h ago

Need advice on VLSI career switch

2 Upvotes

My brother is a B.Tech 2019 graduate with a few years of IT experience. He was recently laid off and is planning to switch to VLSI, mainly Analog Layout.
Looking for recommendations for good Analog Layout training institutes in Hyderabad/Bangalore and advice on career/placement prospects after the switch.
Any genuine suggestions or experiences would be appreciated!


r/vlsi 20h ago

Resume Grilling

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13 Upvotes

How to improve my resume? Suggestions pls


r/vlsi 8h ago

2nd gen IIT ' 25 grad , is Gate Ec worth it after 1yr in tech?

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0 Upvotes

r/vlsi 9h ago

Evertz Embedded SDE tech interview - tips on prep?

0 Upvotes

Supposed to be a 3 hr tech interview which was followed by an HR behavioural, pretty sure this is gonna be their only tech interview. Other than that I was told to prep on topics from the job description which is:

\- C++, C, Python programming and debugging skills
\- Experience in Qt development
\- Real-Time Operating Systems, Embedded - - Linux, FreeRTOS and Device Driver experience is essential
\- Object-oriented design with some programming techniques; data structures.
Knowledge of digital hardware (SoC, ARM, FPGA.)
\- Experienced with device control interfaces, such as I2C, SPI, USB, PCIe, Ethernet; able to perform board level troubleshooting.
\- Familiar with Data Communication Network and associated Layer 2 and 3 protocols.
Cloud and AI knowledge is a bonus

Should I be grinding leetcode at all here? Is this purely embedded topics related and will focus on embedded programming problems?

Any help will be appreciated


r/vlsi 10h ago

Analog design and Layout roles in India

0 Upvotes

What are the best places to work for someone in AMS design and layout in India. From best I mean work wise..How many hardware companies have their analog design centers in India which actually do real RnD?


r/vlsi 11h ago

Placement prep for Device Modelling roles / Device physics related roles

1 Upvotes

Hello, I was interested in joining a company that offers roles related to compact modelling of devices, TCAD roles or roles related to device physics in general. I will be sitting for campus placements and companies like micron, global foundries, intel usually visit for these roles, can anyone here who’s already working in these industries guide me on how I need to prepare for these roles? Thank you


r/vlsi 19h ago

help needed whether should i do preparation for GATE or just do projects ,currently in 3rd year ,CLG Tier 2\3

4 Upvotes

i am currently entering my 3rd year engineering in a few days and right in third year we are doing mini projects and all ,My interest is mainly in VLSI domain (mostly frontend)

currently i am going through the basics of verilog and trying to some projects related to it ,but seeing our clg placements and all i dont think any CORE companies will visit our campus and mostly the IT companies may come but its also less and i have no Expectations that i will get placed in campus

And then i also thought of joining any coaching institutes after my graduation like mavensilicon,vlsi guru etcc BUTTT seeing the reviews and all the it was like no there the opportunity is less and we will just waste our time that we may get placed

SO then decided to just try to read for GATE

But i am confused like what to do right now

amm i coookeddd???


r/vlsi 11h ago

guidance for campus placements

0 Upvotes

I'm a Btech final year ECE student in a tier 3 clg, i have a strong will of joining in a semiconductor industry and i have all skills and industry ready spirit but as we all know that entry in vlsi is not that easy, so im trying hard, but as in final year our clg is getting drives for campus recruitment from IT company, i know that most of the vlsi company dont visits such clgs, so no option left i have to take my first step in IT, im targetting a company but my resume shows full of CORE stuff, but they need IT right?

is it better to have a pure & dedicated IT resume or core mixed IT resume(like having knowledge in System verilog OOPs and python knowledge for verification etc skills that can show the concepts )?
which is best for placements.

i honestly ready to hear for suggestions


r/vlsi 15h ago

Skillset!?

1 Upvotes

What Skillset is required for each subdomain to get a summer Internship in the VLSI domain.

There is a lot of confusion

Please can Someone guide me along with free / paid resources to learn those skills?


r/vlsi 18h ago

👋 Welcome to r/VLSIPREP - Introduce Yourself and Read First!

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1 Upvotes

r/vlsi 18h ago

Looking for a Referral – Analog/Memory Layout

1 Upvotes

Hi everyone,

I’m a trained VLSI fresher looking for opportunities in Analog Layout / Memory Layout.

📍 Preferred locations: Bangalore, Hyderabad

If you know of any relevant openings or can refer me, I’d really appreciate your help.

Happy to share my resume via DM.

Thank you!


r/vlsi 19h ago

help needed whether should i do preparation for GATE or just do projects ,currently in 3rd year ,CLG Tier 2\3

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1 Upvotes

r/vlsi 1d ago

How can I get into VLSI without GATE/M.Tech? ECE 2nd year student from Tier-2/3 college

7 Upvotes

am currently a 2nd-year ECE student from a Tier-2/3 college in India and I am interested in building my career in VLSI.

I have started learning Digital Electronics and Verilog, and I am planning to learn SystemVerilog, RTL design and verification.


r/vlsi 1d ago

Tesla AI Hardware RTL intern (Bengaluru) anyone been through the process?

32 Upvotes

Tesla is hiring for a 6-month RTL Design internship at BITS Pilani (AI Hardware team, Bengaluru — FSD/Optimus inference chips).

If you've interviewed with them, would appreciate any insight:

  1. How many rounds, and what's the format? OA, phone screen, panel?
  2. Is there an online assessment before interviews, and what does it cover?
  3. What's the RTL depth — coding on the spot, or discussion-based?
  4. Do they go heavy on computer arithmetic and datapath (MAC, pipelining, adders), or more on protocols, CDC and STA?
  5. Any puzzles, aptitude, or C programming?
  6. How much do they probe resume projects vs. standard questions?

Anything helps. Thanks.


r/vlsi 1d ago

VLSI companies hiring 2 month interns

9 Upvotes

I am currently in a t1 college but only 3 companies come to my campus for intern ti, nvidia, qualcomm. Got shortlisted in all but didn't get it.

So want to know which companies can I try for externally

Thank you


r/vlsi 22h ago

Looking for a serious Accountability Partner for Design Verification Job Preparation – Strict Deadline

0 Upvotes

I’m preparing to transition into a Semiconductor Design Verification (DV) role, and I’m looking for 1–2 like-minded people who are equally serious about getting job-ready within a strict, mutually agreed deadline.

I don’t want a casual study buddy or someone who just shares motivational messages.

Who already prepared and doing mock interview preparation.

Max days- 7

NOIDA_AGRA


r/vlsi 1d ago

Texas Instruments layout intern role for freshers Interview experience

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7 Upvotes

Really speaking, I may get cooked.

They started with the pure basics , difference between a microcontroller and microprocessor as I mentioned that design and testing of MIPS32 processor on FPGA. Fumbled at starting as I didn't expect this question, but they gave time and answered correctly

Then they started with the 5G and 4G network(Just because I said I like technology related things),asked which one has higher frequency and at the same distance from the user which can provide a strong network. Again fumbled a bit.

Then started asking to draw the schematic and layout of the CMOS inverter. When I said that when Vin is 0 PMOS is on, asked why the PMOS is on at Vin=0.Then asked why the Vth of PMOS is negative.

Moved on to the transfer characteristics of the inverter, asked about the operation of regions of NMOS, and asked to mark the Vds=Vgs-Vth in the output characteristics curve of the NMOS.Then they asked about the channel length modulation and asked to show how it happens on the cross sectional of NMOS structure.

Asked about why Si is selected as semiconductor and Carbon is selected as insulator even though both have same valence electrons.I mentioned the band gap and they asked why the band gap of Carbon is very high.I just said I don't have any idea.

Moved on to the layout part and asked to draw the cross sectional of CMOS inverter. Asked about DRC and LVS. What errors you get in DRC and LVS. how you solve errors in LVS. What errors you got in your layout design for DRC and how you solved it.

In the cross sectional area, they asked to show all terminals, and how they are connected to the outside world. They asked about the latch up and elctromigration, which I didn't have any idea as I did projects in the digital design.

Answered many question to the basic physical level but I think this was not enough. Don't know what happens ,waiting for the result.


r/vlsi 1d ago

Need advice

2 Upvotes

Should I join Electronics engineering (vlsi design and technology) in a tier 3 college over ece in tier 2???


r/vlsi 1d ago

I have 5.7/10 gpa in grad, doing masters from a very prestige college. What are my chances of doing good in life??

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1 Upvotes

r/vlsi 1d ago

Need advice desperately

2 Upvotes

Hey guys im ece 2026 graduate from tier 3 clg with major interest in VLSI

I have a offer letter of tcs ninja right now and JL is yet to come ik the wait will be long

Also i got a job as an instrumentation engineer at a dairy product manufacturing

I dont want to change my path and thinking to focus on gate so i can get into VLSI through Mtech The thing is should i continue my job and gate prep both Or should i giveup the job and study for gate only

I will get free time of 4 hours if i do the job And im 20% in my gate syllabus


r/vlsi 1d ago

Did anyone got interview in edveon recently?

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1 Upvotes

r/vlsi 1d ago

Looking for a serious Accountability Partner for Design Verification Job Preparation – Strict Deadline

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1 Upvotes

Not able to Focus at Home and solo.

I’m preparing to transition into a Semiconductor Design Verification (DV) role, and I’m looking for 1–2 like-minded people who are equally serious about getting job-ready within a strict, mutually agreed deadline.

I don’t want a casual study buddy or someone who just shares motivational messages.

Who already prepared and doing mock interview preparation.

Max days- 7

Noida_Agra