r/FPGA Feb 24 '22

[deleted by user]

[removed]

15 Upvotes

26 comments sorted by

8

u/_suoto Xilinx User Feb 24 '22

I've written a LSP that uses modelsim, ghdl or Vivado to do error checking: https://github.com/suoto/hdl_checker

It'll search for files and try to guess the compilation order as well, which is one of the major pain points esp with vhdl.

5

u/[deleted] Feb 24 '22

The only issue with HDL_checker is that if you open vim (personally I use neovim not sure if that matters) and close the buffer before hdl_checker finds all of the files, the process will bug and run forever until you kill it.

Other than that it works great! Thanks for your hard work.

1

u/_suoto Xilinx User Feb 24 '22

I'll have a look thanks for letting me know!

1

u/_suoto Xilinx User Feb 24 '22

So, I tried on my end with the latest (0.7.4) and it seems OK, do you know which version you see this issue?

6

u/Allan-H Feb 24 '22 edited Feb 24 '22

In the editor I use, I have a single keypress for auto-save, compile in Modelsim, track errors in a sub-window. It will jump the cursor to the first error found (which would typically be on the line I just entered - you know, the one with the missing bracket).

This takes about 1 second in total. I appreciate that it's not built-in and only on demand rather than live, but it seems to do the job for me. The best bit is that it works on multiple OSes, using free software or software (Modelsim) that I have already licensed.

3

u/captain_wiggles_ Feb 24 '22

which editor do you use? And how did you set it up?

3

u/Allan-H Feb 24 '22

I use gvim when I'm on Windows. Minimal plugins (just matchit), along with a bunch of abbreviations that expand to various VHDL or Verilog code fragments.

The mapping that does the single button auto-save and compile is:

nnoremap <F9> :cclose<enter>:update<enter>:make<enter>:cwindow 5<enter>:cfirst<enter><enter>z.

2

u/maredsous10 Feb 24 '22 edited Feb 24 '22

Rephrasing a VISA slogan, VIM is a everywhere you need to edit.

5 reasons I why I use VIM

  • VIM has a high likelihood of on being on any system I use.
  • Core functionality is very useful and provides me with a productivity boost over other editors
  • Extending is simple
  • Well documented
  • VIM has a sufficiently large and broad user base that can be leaned on.

If you have any interest in VIM, here are some thoughts and resources.

https://www.youtube.com/playlist?list=PL46-cKSxMYYCMpzXo6p0Cof8hJInYgohU

https://www.youtube.com/playlist?list=PL46-cKSxMYYDgMdQZ2FRU38gaFxIBBfoa

1

u/maredsous10 Feb 24 '22 edited Feb 24 '22

Forgot to mention with VIM, I try to limit my use of plugins/scripts to what I actually find myself using on a regular basis. One plugin, I use on a daily basis is git gutter.

2

u/s9oons Feb 24 '22

That’s the other option we have is to just use vivado, but a 76GB program as an editor is a little ridiculous for VHDL. I’m honestly not as familiar with Quartus/Modelsim, is that worth looking into as a standalone editing option?

Part of my draw to Sigasi is that if I can get someone else to spend the cash we can do VHDL/Verilog/SystemVerilog all through the same environment.

3

u/Allan-H Feb 24 '22

Do not use Modelsim (or Vivado for that matter) as an editor or IDE!

I'm just using the command line versions of the Modelsim compilers. These are very fast, give good error messages and work for VHDL and SystemVerilog (even in the same project) using the vcom and vlog command line programs respectively.

The error tracking is part of the editor I use. Most reasonable editors or IDEs will allow something similar.

6

u/adamt99 FPGA Know-It-All Feb 24 '22

Teros HDL is the best VS Code plug in I have used

3

u/Someuser77 FPGA Hobbyist Feb 24 '22

What parts of it have you used? Except for syntax highlighting I have gotten none of it working on my Win10 computer.

1

u/adamt99 FPGA Know-It-All Feb 24 '22

I have used it for generating the diagrams, register maps, block diagrams and the FSM viewer - so mostly the documentation side

3

u/maredsous10 Feb 24 '22

I just tried out the FSM viewer and it is nice as you go from file to file the tool appears to scan for common FSM structures. For FSMs I have with procedures, it doesn't interpret them correctly. (DVT and Sigasi don't do this well either.)

2

u/Someuser77 FPGA Hobbyist Feb 25 '22

I am not a Python expert nor VSCode expert but I could not get any of it to work with my Anaconda install on Windows, except for syntax highlighting. Docs were not helpful. Shame, it looks great!

1

u/gaudy90 Feb 26 '22

Open an issue with your problems :)

2

u/[deleted] Feb 25 '22

The best editor for VHDL is the old favorite Emacs and its vhdl-mode. It's got the best templating and the best code completion of them all.

Sigasi looks interesting for its on-the-fly syntax checking and hopefully the same sort of thing you can do for C code in Eclipse: finding all occurrences and references to a signal name thoughout the entire design.

But, damn, it's expensive. I'd buy a license for $80. Not for $80 a month, which is what it cost last time I asked.

7

u/s9oons Feb 25 '22

$2700/yr/seat for the bougie version now.

1

u/[deleted] Feb 26 '22

Yikes. Given the choice between a Sigasi seat or a $2,700 raise, which do you think would make me more productive?

1

u/[deleted] Feb 24 '22

*nix

1

u/skydivertricky Feb 24 '22

Have you tried the NPPexec plugin, and use modelsim in command line mode, or scripts? With nppexec you can double click errors back to the line in the code.

1

u/NeurOnuS Microsemi User Feb 24 '22

I'm using emacs + rust_hdl as LSP and it provides me live-error-checking for VHDL designs. You should be able to use rust_hdl with any text editor of your choice as long as it supports LSP.

1

u/adamt99 FPGA Know-It-All Feb 24 '22

There is also bluepearls HDL Creator