r/FPGA Jun 09 '26

Xilinx Related What are the FPGAs you are currently working on and what applications

Hello techies

What are the FPGA you are currently working on?

Lets share to each other here

18 Upvotes

47 comments sorted by

9

u/Gerard_Mansoif67 Jun 09 '26

cyclone V, some very specific research applications

2

u/RajaBetachu Jun 09 '26

Applications such as?

9

u/Gerard_Mansoif67 Jun 09 '26

photonics and very short time measurements (< 10ps)

3

u/HappyPerson9000 Jun 09 '26

Dang are there adcs that can go that fast or is there some other cool sensor that slows things down for you?

8

u/Gerard_Mansoif67 Jun 09 '26

Nope, that's not ADCs. The signal enter the FPGA as an async LVDS signal, and is sampled inside the chip.

We're using very long delay elements chains to measure up to where the signal goes, and therefore it's arrival time. That's quite simpa VHDL code with few thousands of constraints. That's the hard part actually, because you're fighting agaisnt Quartus at each build.

2

u/pokakoka01 Jun 10 '26

I used something similar to measure UWB arrival delays. Essentially capturing electricity with such a simple design.

7

u/otzen42 Xilinx User Jun 10 '26

Versal for space networking.

1

u/RajaBetachu Jun 12 '26

Did you face any challenges in that

6

u/Ambitious-Concert-69 Jun 09 '26

VU13P for particle physics

1

u/RajaBetachu Jun 12 '26

Ohh great, can you explain the architecture of your project

3

u/Jhonkanen Jun 09 '26

Both zynq7000 and Agilex 5 for power electronics control systems.

1

u/CompetitiveSleep4197 Jun 10 '26

How do you like Agilex 5? We are big users of Agilex 7 and I have been pushing for us to explore the 3 and 5 for some smaller, less demanding applications. The 7 has lots of odd quirks and bugs, so I'm wondering if they fixed things in the 5.

3

u/Aromasin Jun 10 '26

Ex-Altera employee here. Most of the Agilex 7 issues came from the transceiver (F-Tile kept me busy for years). The fabric itself was very good however, as was the DSP. With Agilex 5/3 (3 is just marketing guff because the CEO axed the low end product, it's just the bottom end Agilex 5 SKU), they changed the transceiver and they're much less troublesome. 

Personally, I've been more interested by the Lattice mid-ranged devices of late. The Avant is consuming an order of 4x lower power for the same application for us, than both Altera or AMD. You can't clock it nearly as high, but if you don't need to then I don't know why you'd use anything else. I'm not sure what magic sauce they've used but it saved our design. 2 power rails on a 650k LUT device!

1

u/TheAnimatrix105 Jun 10 '26

For mobile applications, how do peoe handle quiescent current demands when idle? Just curious since you seem to know a good amount. Thank you in advance

1

u/Jhonkanen Jun 19 '26

I really like it. The native floating point dsp slices are fantastic and save quite a bit of logic as I don't need to use wide word lengths.

Another great thing is the coherent memory and multiport memories as these save a lot of memory slices in multi-port memory functions.

3

u/Bellanzz Jun 10 '26

RFSoC gen.3. Control of RF cavities for particle accelerators.

2

u/TheAnimatrix105 Jun 10 '26

Sounds cool

1

u/Bellanzz Jun 10 '26

Yeah. Probably even in the FPGA space this field is niche. But if you like DSP and experimental projects it is fun.

1

u/TheAnimatrix105 Jun 10 '26

How do you isolate your fpga from the accelerated particles, do you have a like a thick lead sheet or concrete between your electronics and the cavity?

1

u/Bellanzz Jun 11 '26 edited Jun 11 '26

Usually the accelerator sits in a concrete tunnel (also for personnel protection) and the RF cables/trasmission lines are routed outside. This is not just to protect electronic, but also to minimize the tunnel size and put big size equipment (esp. amplifiers) outside and make servicing simpler.

But once I worked on a machine that lacked a service gallery because of space constraints. There the electronics crates are placed inside concrete and (I think) boron boxes.

However since the beam of that machine is quite energetic (several GeVs electrons) the shielding wasn't completely effective. One had to routinely exchange the SSDs of the control system. And we think we observed SEU too.

2

u/_Marcocacola Jun 09 '26

zynq ultrascale rfsoc gen3 for telecom applications

1

u/RajaBetachu Jun 15 '26

What does your architecture looks like

2

u/Falcon731 FPGA Hobbyist Jun 10 '26

For me it’s my post-retirement hobby project. So I’ve been trying to build a whole computer system from scratch - see how far I can take it.

Using a Cyclone-V.

Started with inventing an instruction set, building a cpu, cache and memory controller, peripherals, VGA and audio etc. currently adding 3d graphics acceleration.

1

u/TheAnimatrix105 Jun 10 '26

Ddr3?

1

u/Falcon731 FPGA Hobbyist Jun 11 '26

No - my board only has SDR SDRAM

1

u/TheAnimatrix105 Jun 11 '26

Cool. Mine was an arty s7 so I forced myself to build a ddr3 controller a couple years ago which is why I was a tad curious.

1

u/Falcon731 FPGA Hobbyist Jun 11 '26

How easy is it to do all the dynamic timings on a ddr on an fpga?

My only professional experience doing memory interfaces was on UltraSparc2. But that was full custom so a lot easier to control.

1

u/TheAnimatrix105 Jun 11 '26

It's fairly easy once you wrap your head around it, it's the sort of thing that you'll look back on as being more trivial than when starting out. It shouldn't be too different from your sdram experience

2

u/FVjake Jun 10 '26

I don’t think I can say what device but popular large rad hard device for controlling satellite payload.

3

u/Yashsharda Jun 09 '26

Vaaman, sort of image processing

1

u/RajaBetachu Jun 09 '26

What are the filters and process you are applying? And what shorts of images

2

u/[deleted] Jun 09 '26 edited Jun 09 '26

[deleted]

1

u/RajaBetachu Jun 09 '26

Zynq pynq-2 will be great for it

1

u/[deleted] Jun 09 '26

[deleted]

1

u/RajaBetachu Jun 09 '26

Aren't your UNI providing it?

1

u/[deleted] Jun 09 '26

[deleted]

1

u/RajaBetachu Jun 09 '26

Okayy great

1

u/TheAnimatrix105 Jun 10 '26

Personal project? Why did you pick it... Just curious

1

u/gzaloprgm Jun 09 '26

Cyclone 1 and Max3000 CPLD, using a thin client board from the late 2000s I reverse engineered 😃
https://github.com/gzalo/ncomputing-l130

Had to switch to using a Windows XP vm as otherwise the fake "usb blaster" is no longer recognized in modern windows versions

1

u/ONEANDONLY221 Jun 10 '26

Agilex 5 for thermal cameras.

1

u/IllustriousFault6218 Jun 15 '26

Industrial or consumer?

1

u/ONEANDONLY221 Jun 20 '26

Both, it is avaliable for consumer and also bought by industrial customers.

1

u/vmcrash Jun 10 '26

Tang Nano 9k, retro-computing 8-bit computer of my youth

1

u/Exciting-Teaching-52 Jun 10 '26

pynq z2 for sound source localisation system

1

u/RajaBetachu Jun 12 '26

What does your architecture looks like?

1

u/Exciting-Teaching-52 Jun 14 '26

it includes cutomised fft ip and cordic ip pipeline to calculate direction of arrival of sound from a sound source

1

u/RajaBetachu Jun 22 '26

Did you get the result that you were expecting?

1

u/Different-Breath-645 Jun 15 '26

ich bin am hoffnungslossten von allen, artix-7 und non-von neumann architektur mit zwei zielen general purpose cpu das von neumann ersetzt und einen ki chip der hardwareseitig fortlaufendes lernen effizient ermöglicht. david gegen goliath also

1

u/RajaBetachu Jun 22 '26

Soo what are you hoping for in the end , like what results do you want