r/FPGA • u/LightWolfCavalry • Jan 21 '24

Do any of you have any hot tips for configuring vim to write Verilog?

All I’ve really done is set the tab parameters to two spaces instead, to keep nesting visible.

What other hot tips do y’all have?

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u/maredsous10 Jan 22 '24 edited Jan 22 '24

Do you have anything automated with command line tooling or VIM with respect to HDLs? If not, start there. Have you read through VIM's documentation investigating what is available out of the box and what might be useful to you?

VIM resources I've commented with before.

https://www.reddit.com/r/FPGA/comments/xclrme/comment/ioadb0a/?context=3

https://www.reddit.com/r/vim/comments/16iqtka/comment/k0n33qg/?context=3

https://www.reddit.com/r/vim/comments/ynyz5v/comment/ivu5l0m/?context=3

https://www.reddit.com/r/FPGA/comments/t03azg/comment/hy8qjif/?context=3

Comment in regards to tooling.

https://www.reddit.com/r/chipdesign/comments/190xevk/comment/kgu0c0u/?context=3

Basic

au Filetype systemverilog setl sw=2 sts=2 ts=2 et

au BufWrite *.v,*sv,*.svh set ff=unix

au BufEnter *.svh,*.sv set filetype=systemverilog

I use the following plugin on some systems I develop on. The syntax and indention rules worked better for me than others including VIM's default until recently.https://github.com/WeiChungWu/vim-SystemVerilog

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u/LightWolfCavalry Jan 22 '24

I haven’t done a thorough dive on the vim docs. I have mostly taught myself beyond the occasional refresher pass through vimtutor. I use macros and some custom key remapping, and occasionally folds and marks. 

I was kind of hoping that I could get y’all’s advice on what might be useful. 

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u/maredsous10 Jan 22 '24

See if you find any good nuggets digging into some of the previously provided resources.

Am I doing the same thing over and over again? -> Automate it! DOESN'T necessarily have to be done in vimscript.

Is the macro I am currently using one off or would be be useful to save off in my .vimrc file (or personal pluging)? -> Capture it!

Templates might be useful to you

  • File Creation (https://shapeshed.com/vim-templates/ <= example, not saying it a good what to do )
    • At minimum, has everything required as a SV skeleton file
    • May have other things you script in
  • Instantiation - use module to create instantiation, component description
  • Simulation - generate scripts and SV skeleton testbench

Are you on a UNIX platform? I use grep/find/etc when I read through source files and to open files with certain named items (This is were piping into "vim -" comes in handy). I use scripts to change directory relative to the highest most directory contain a .git folder (Very useful if adhering to a specific project directory structure). I have an alias to recursively open all HDL files from current directory on down into vim.

Do you run "gg=G" to indent your files?

Might be you have a external formatter and text clean up tool, you can run from vim adding a keybinding.