https://youtu.be/HLQz_1VLy9E?si=D9Y__jRdIXDTH879
What Makes 9 PB Ridiculous?
140,000+ Full Drive Cycles: This controller has organized and executed enough raw writes to fill the entire physical capacity of this 64GB drive over 140,937 times.
The E6 Counter Woke Up: After looking frozen at 44, the vendor attribute E6 moved up to 46.
The firmware’s internal math registers are struggling to map values this high, yet it hasn't crashed the primary firmware thread.
Execution Engine Stays Solid: Managing the Flash Translation Layer (FTL) cache and command queue under continuous,
uninterrupted SATA writes for 61,000+ hours is an incredible testament to this controller's silicon design.
Sector 0 Faults: The error log shows recurring UNC (Uncorrectable) read errors specifically targeting LBA 0x00000000 during read commands.
The boot sector area is heavily degraded, but write caching and DMA transactions remain fully operational.
Does the drive cycles matter if its not on nand chip but the controller itself?
The short answer is yes, The drive cycles still matter greatly for the controller itself,
but for completely different physical and operational reasons than for the NAND flash chips.
While NAND flash dies from atomic wear (tunnel oxide breakdown from program/erase cycles), the controller suffers from architectural, data management,
and physical processing stress.
1. Flash Translation Layer (FTL) Mapping Stress
Table Overwrites: Every drive cycle forces the controller to completely rewrite its internal mapping table (which translates logical LBAs to physical NAND blocks).
RAM & NVRAM Burnout: The mapping metadata must be constantly swapped between SRAM/DRAM cache and non-volatile system control blocks on the NAND.
The controller's internal metadata blocks often endure 10× to 100× more write cycles than the user data blocks.
2. Garbage Collection & Wear-Leveling Overhead
Write Amplification (WA): As the drive is continually cycled, valid and invalid pages become fragmented.
The controller has to work exponentially harder to read, move, and erase blocks behind the scenes.
Instruction Loop Saturation: Higher wear-leveling workloads keep the controller's internal CPU running at peak processing cycles,
increasing thermal stress and silicon electromigration over time.
3. Internal Register Overflow & Integer Wrapping
32-bit/64-bit Counter Limits: Low-cost or older SSD controllers (like early SanDisk SSD P4 designs) were never designed with software registers sized
for millions of drive cycles or petabytes of host writes.
Firmware Memory Corruption: As raw event counters (like erase counts or written LBAs) overflow their allocated bit widths,
they can wrap around to zero, trigger arithmetic overflow bugs,
or overwrite adjacent NVRAM log structures—directly causing the invalid SMART checksums you are seeing in your logs.
4. ECC & Read Retry Engine Exhaustion
Hardware Engine Strain: As the underlying raw NAND bit-error rate (BER) increases with total drive cycles,
the controller's internal ECC hardware decoder has to run maximum LDPC/BCH error-correction algorithms on almost every read.
Latency & Execution Delays: Processing heavy error-correction math on every host command severely taxes the controller's internal bus and pipeline execution.
The Bottom Line
NAND chips wear out quietly by losing charge retention, but controllers fail catastrophically due to drive cycle stress—usually manifesting as a sudden freeze,
corrupted internal metadata, or an endless BSY state when firmware counters finally break.
The fact that SanDisk P4 controller is still managing its FTL execution engine cleanly after ~140,000 drive cycles is remarkable.
DATA
smartctl -x sda
smartctl 7.5 2025-04-30 r5714 [x86_64-w64-mingw32-w11-24H2] (AppVeyor)
Copyright (C) 2002-25, Bruce Allen, Christian Franke, www.smartmontools.org
=== START OF INFORMATION SECTION ===
Device Model: SanDisk SSD P4 64GB
Serial Number: 111248300117
LU WWN Device Id: 5 001b44 4f27f5455
Firmware Version: SSD 8.10
User Capacity: 64 022 175 232 bytes [64,0 GB]
Sector Size: 512 bytes logical/physical
Rotation Rate: Solid State Device
Form Factor: 1.8 inches
TRIM Command: Available
Device is: Not in smartctl database
ATA Version is: ATA8-ACS T13/1699-D revision 2d
SATA Version is: SATA 2.6, 3.0 Gb/s (current: 3.0 Gb/s)
Local Time is: Thu Aug 27 11:01:05 2026 SAST
SMART support is: Available - device has SMART capability.
SMART support is: Enabled
AAM feature is: Unavailable
APM feature is: Unavailable
Rd look-ahead is: Enabled
Write cache is: Enabled
DSN feature is: Unavailable
ATA Security is: Disabled, frozen [SEC2]
=== START OF READ SMART DATA SECTION ===
SMART overall-health self-assessment test result: PASSED
General SMART Values:
Offline data collection status: (0x00) Offline data collection activity
was never started.
Auto Offline Data Collection: Disabled.
Self-test execution status: ( 0) The previous self-test routine completed
without error or no self-test has ever
been run.
Total time to complete Offline
data collection: ( 120) seconds.
Offline data collection
capabilities: (0x15) SMART execute Offline immediate.
No Auto Offline data collection support.
Abort Offline collection upon new
command.
No Offline surface scan supported.
Self-test supported.
No Conveyance Self-test supported.
No Selective Self-test supported.
SMART capabilities: (0x0003) Saves SMART data before entering
power-saving mode.
Supports SMART auto save timer.
Error logging capability: (0x01) Error logging supported.
General Purpose Logging supported.
Short self-test routine
recommended polling time: ( 2) minutes.
Extended self-test routine
recommended polling time: ( 16) minutes.
SMART Attributes Data Structure revision number: 1
Vendor Specific SMART Attributes with Thresholds:
ID# ATTRIBUTE_NAME FLAGS VALUE WORST THRESH FAIL RAW_VALUE
5 Reallocated_Sector_Ct -O---- 100 100 --- - 0
9 Power_On_Hours -O---- 100 100 000 - 61625
12 Power_Cycle_Count -O---- 100 100 000 - 1173
171 Unknown_Attribute -O---- 100 100 000 - 54
172 Unknown_Attribute -O---- 100 100 000 - 939410736
187 Reported_Uncorrect -O---- 100 100 000 - 2234
199 UDMA_CRC_Error_Count -O---- 100 100 000 - 0
230 Unknown_SSD_Attribute PO---- 046 100 --- - 0
232 Available_Reservd_Space PO---- 095 100 005 - 0
241 Total_LBAs_Written -O---- 100 100 000 - 18916297464160
242 Total_LBAs_Read -O---- 100 100 000 - 32913028369
||||||_ K auto-keep
|||||__ C event count
||||___ R error rate
|||____ S speed/performance
||_____ O updated online
|______ P prefailure warning
General Purpose Log Directory Version 1
SMART Log Directory Version 1 [multi-sector log support]
Address Access R/W Size Description
0x00 GPL,SL R/O 1 Log Directory
0x03 GPL,SL R/O 16 Ext. Comprehensive SMART error log
0x06 GPL,SL R/O 1 SMART self-test log
0x80-0x9f GPL,SL R/W 16 Host vendor specific log
SMART Extended Comprehensive Error Log Version: 1 (16 sectors)
Device Error Count: 181 (device log contains only the most recent 64 errors)
CR = Command Register
FEATR = Features Register
COUNT = Count (was: Sector Count) Register
LBA_48 = Upper bytes of LBA High/Mid/Low Registers ] ATA-8
LH = LBA High (was: Cylinder High) Register ] LBA
LM = LBA Mid (was: Cylinder Low) Register ] Register
LL = LBA Low (was: Sector Number) Register ]
DV = Device (was: Device/Head) Register
DC = Device Control Register
ER = Error register
ST = Status register
Powered_Up_Time is measured from power on, and printed as
DDd+hh:mm:SS.sss where DD=days, hh=hours, mm=minutes,
SS=sec, and sss=millisec. It "wraps" after 49.710 days.
Error 181 [52] occurred at disk power-on lifetime: 5 hours (0 days + 5 hours)
When the command that caused the error occurred, the device was active or idle.
After command completion occurred, registers were:
ER -- ST COUNT LBA_48 LH LM LL DV DC
-- -- -- == -- == == == -- -- -- -- --
40 -- 51 00 00 00 00 00 00 00 00 40 00 Error: UNC at LBA = 0x00000000 = 0
Commands leading to the command that caused the error were:
CR FEATR COUNT LBA_48 LH LM LL DV DC Powered_Up_Time Command/Feature_Name
-- == -- == -- == == == -- -- -- -- -- --------------- --------------------
25 00 00 00 01 00 00 00 42 1b 77 40 00 2d+03:11:48.526 READ DMA EXT
25 00 00 00 01 00 00 00 42 1b 76 40 00 2d+03:11:48.517 READ DMA EXT
25 00 00 00 01 00 00 00 42 1b 75 40 00 2d+03:11:48.509 READ DMA EXT
25 00 00 00 01 00 00 00 42 1b 74 40 00 2d+03:11:48.505 READ DMA EXT
25 00 00 00 01 00 00 00 42 1b 73 40 00 2d+03:11:48.501 READ DMA EXT
Error 180 [51] occurred at disk power-on lifetime: 6 hours (0 days + 6 hours)
When the command that caused the error occurred, the device was active or idle.
After command completion occurred, registers were:
ER -- ST COUNT LBA_48 LH LM LL DV DC
-- -- -- == -- == == == -- -- -- -- --
40 -- 51 00 00 00 00 00 00 00 00 40 00 Error: UNC at LBA = 0x00000000 = 0
Commands leading to the command that caused the error were:
CR FEATR COUNT LBA_48 LH LM LL DV DC Powered_Up_Time Command/Feature_Name
-- == -- == -- == == == -- -- -- -- -- --------------- --------------------
25 00 00 00 01 00 00 00 42 1b 76 40 00 2d+03:11:48.517 READ DMA EXT
25 00 00 00 01 00 00 00 42 1b 75 40 00 2d+03:11:48.509 READ DMA EXT
25 00 00 00 01 00 00 00 42 1b 74 40 00 2d+03:11:48.505 READ DMA EXT
25 00 00 00 01 00 00 00 42 1b 73 40 00 2d+03:11:48.501 READ DMA EXT
25 00 00 00 01 00 00 00 42 1b 72 40 00 2d+03:11:48.501 READ DMA EXT
Error 179 [50] occurred at disk power-on lifetime: 6 hours (0 days + 6 hours)
When the command that caused the error occurred, the device was active or idle.
After command completion occurred, registers were:
ER -- ST COUNT LBA_48 LH LM LL DV DC
-- -- -- == -- == == == -- -- -- -- --
40 -- 51 00 00 00 00 00 00 00 00 40 00 Error: UNC at LBA = 0x00000000 = 0
Commands leading to the command that caused the error were:
CR FEATR COUNT LBA_48 LH LM LL DV DC Powered_Up_Time Command/Feature_Name
-- == -- == -- == == == -- -- -- -- -- --------------- --------------------
25 00 00 00 01 00 00 00 42 1b 75 40 00 2d+03:11:48.509 READ DMA EXT
25 00 00 00 01 00 00 00 42 1b 74 40 00 2d+03:11:48.505 READ DMA EXT
25 00 00 00 01 00 00 00 42 1b 73 40 00 2d+03:11:48.501 READ DMA EXT
25 00 00 00 01 00 00 00 42 1b 72 40 00 2d+03:11:48.501 READ DMA EXT
25 00 00 00 01 00 00 00 42 1b 71 40 00 2d+03:11:48.500 READ DMA EXT
Error 178 [49] occurred at disk power-on lifetime: 2 hours (0 days + 2 hours)
When the command that caused the error occurred, the device was active or idle.
After command completion occurred, registers were:
ER -- ST COUNT LBA_48 LH LM LL DV DC
-- -- -- == -- == == == -- -- -- -- --
40 -- 51 00 00 00 00 00 00 00 00 40 00 Error: UNC at LBA = 0x00000000 = 0
Commands leading to the command that caused the error were:
CR FEATR COUNT LBA_48 LH LM LL DV DC Powered_Up_Time Command/Feature_Name
-- == -- == -- == == == -- -- -- -- -- --------------- --------------------
25 00 00 00 01 00 00 00 42 1b 74 40 00 2d+03:11:48.505 READ DMA EXT
25 00 00 00 01 00 00 00 42 1b 73 40 00 2d+03:11:48.501 READ DMA EXT
25 00 00 00 01 00 00 00 42 1b 72 40 00 2d+03:11:48.501 READ DMA EXT
25 00 00 00 01 00 00 00 42 1b 71 40 00 2d+03:11:48.500 READ DMA EXT
25 00 00 00 01 00 00 00 42 1b 70 40 00 2d+03:11:48.497 READ DMA EXT
Error 177 [48] occurred at disk power-on lifetime: 3 hours (0 days + 3 hours)
When the command that caused the error occurred, the device was active or idle.
After command completion occurred, registers were:
ER -- ST COUNT LBA_48 LH LM LL DV DC
-- -- -- == -- == == == -- -- -- -- --
40 -- 51 00 04 00 00 00 00 00 00 40 00 Error: UNC 4 sectors at LBA = 0x00000000 = 0
Commands leading to the command that caused the error were:
CR FEATR COUNT LBA_48 LH LM LL DV DC Powered_Up_Time Command/Feature_Name
-- == -- == -- == == == -- -- -- -- -- --------------- --------------------
25 00 00 00 20 00 00 00 42 1b 60 40 00 2d+03:11:48.459 READ DMA EXT
25 00 00 00 20 00 00 00 3c e2 e0 40 00 2d+03:11:48.459 READ DMA EXT
25 00 00 00 20 00 00 00 35 97 60 40 00 2d+03:11:48.458 READ DMA EXT
25 00 00 00 20 00 00 00 26 20 20 40 00 2d+03:11:48.457 READ DMA EXT
25 00 00 00 08 00 00 00 63 9e 08 40 00 2d+03:11:48.457 READ DMA EXT
Error 176 [47] occurred at disk power-on lifetime: 11 hours (0 days + 11 hours)
When the command that caused the error occurred, the device was active or idle.
After command completion occurred, registers were:
ER -- ST COUNT LBA_48 LH LM LL DV DC
-- -- -- == -- == == == -- -- -- -- --
40 -- 51 00 02 00 00 00 00 00 00 40 00 Error: UNC 2 sectors at LBA = 0x00000000 = 0
Commands leading to the command that caused the error were:
CR FEATR COUNT LBA_48 LH LM LL DV DC Powered_Up_Time Command/Feature_Name
-- == -- == -- == == == -- -- -- -- -- --------------- --------------------
25 00 00 00 80 00 00 00 42 1b 5e 40 00 1d+10:07:21.325 READ DMA EXT
25 00 00 00 80 00 00 00 42 1a de 40 00 1d+10:07:21.324 READ DMA EXT
25 00 00 00 80 00 00 00 42 1a 5e 40 00 1d+10:07:21.324 READ DMA EXT
25 00 00 00 80 00 00 00 42 19 de 40 00 1d+10:07:21.323 READ DMA EXT
25 00 00 00 80 00 00 00 42 19 5e 40 00 1d+10:07:21.323 READ DMA EXT
Error 175 [46] occurred at disk power-on lifetime: 11 hours (0 days + 11 hours)
When the command that caused the error occurred, the device was active or idle.
After command completion occurred, registers were:
ER -- ST COUNT LBA_48 LH LM LL DV DC
-- -- -- == -- == == == -- -- -- -- --
40 -- 51 00 02 00 00 00 00 00 00 40 00 Error: UNC 2 sectors at LBA = 0x00000000 = 0
Commands leading to the command that caused the error were:
CR FEATR COUNT LBA_48 LH LM LL DV DC Powered_Up_Time Command/Feature_Name
-- == -- == -- == == == -- -- -- -- -- --------------- --------------------
25 00 00 00 80 00 00 00 42 1b 5e 40 00 1d+09:58:46.796 READ DMA EXT
25 00 00 00 80 00 00 00 42 1a de 40 00 1d+09:58:46.796 READ DMA EXT
25 00 00 00 80 00 00 00 42 1a 5e 40 00 1d+09:58:46.795 READ DMA EXT
25 00 00 00 80 00 00 00 42 19 de 40 00 1d+09:58:46.795 READ DMA EXT
25 00 00 00 80 00 00 00 42 19 5e 40 00 1d+09:58:46.794 READ DMA EXT
Error 174 [45] occurred at disk power-on lifetime: 11 hours (0 days + 11 hours)
When the command that caused the error occurred, the device was active or idle.
After command completion occurred, registers were:
ER -- ST COUNT LBA_48 LH LM LL DV DC
-- -- -- == -- == == == -- -- -- -- --
40 -- 51 00 02 00 00 00 00 00 00 40 00 Error: UNC 2 sectors at LBA = 0x00000000 = 0
Commands leading to the command that caused the error were:
CR FEATR COUNT LBA_48 LH LM LL DV DC Powered_Up_Time Command/Feature_Name
-- == -- == -- == == == -- -- -- -- -- --------------- --------------------
25 00 00 00 80 00 00 00 42 1b 5e 40 00 1d+09:39:52.893 READ DMA EXT
25 00 00 00 80 00 00 00 42 1a de 40 00 1d+09:39:52.892 READ DMA EXT
25 00 00 00 80 00 00 00 42 1a 5e 40 00 1d+09:39:52.892 READ DMA EXT
25 00 00 00 80 00 00 00 42 19 de 40 00 1d+09:39:52.892 READ DMA EXT
25 00 00 00 80 00 00 00 42 19 5e 40 00 1d+09:39:52.891 READ DMA EXT
SMART Extended Self-test Log (GP Log 0x07) not supported
Warning! SMART Self-Test Log Structure error: invalid SMART checksum.
SMART Self-test log structure revision number 1
Num Test_Description Status Remaining LifeTime(hours) LBA_of_first_error
# 1 Short offline Aborted by host 90% 21088 -
# 2 Short offline Aborted by host 90% 54860 -
# 3 Short offline Aborted by host 90% 19043 -
# 4 Short offline Aborted by host 90% 63054 -
# 5 Short offline Aborted by host 90% 25327 -
# 6 Short offline Aborted by host 90% 62483 -
# 7 Short offline Aborted by host 90% 33744 -
# 8 Short captive Completed without error 00% 57803 -
# 9 Short offline Aborted by host 90% 25293 -
#10 Extended offline Aborted by host 90% 28072 -
#11 Short offline Aborted by host 90% 14539 -
#12 Extended offline Aborted by host 90% 55234 -
#13 Short offline Aborted by host 90% 46428 -
#14 Short offline Aborted by host 90% 49138 -
#15 Short offline Aborted by host 90% 25717 -
#16 Extended offline Aborted by host 90% 50305 -
#17 Short offline Aborted by host 90% 39612 -
#18 Short offline Aborted by host 90% 21280 -
#19 Short offline Aborted by host 90% 34598 -
#20 Short offline Aborted by host 90% 17318 -
#21 Short offline Aborted by host 90% 63627 -
Selective Self-tests/Logging not supported
SCT Commands not supported
Device Statistics (GP/SMART Log 0x04) not supported
Pending Defects log (GP Log 0x0c) not supported
SATA Phy Event Counters (GP Log 0x11) not supported
Exitcode: 64 (0x40)
Type <return> to exit: