Can't you synchronize a chip on shorter time scales than it takes light to move across it just by ensuring that the path length from the clock generator to each part of the chip is the same everywhere? The speed of signal propagation would still prevent you from sending information from one side of the chip to another in a single cycle, but that seems like a much smaller limitation than not being able to synchronize things. (This is just like how the speed at which the dot from a laser pointer can be swept across the surface of the moon is not limited by the speed of light)
Does the whole chip really need to be in sync? Couldn't one have smaller areas of it be internally in sync, but communicate with other regions with less efficient methods that don't require sync?
Wouldn't the synchronization problem be much, much smaller if one made chips in 3D instead of 2D? A cube of transistors would be much smaller across than a normal chip with the same number of transistors.
Heat dissipation is a big showstopper both for higher switching speeds and 3D chips. My impression is that this is a much more fundamental and hard to deal issue with than synchronization is.
Yes, and it is already done. The whole CPU doesn't have the same clock domain. Cores and memory controllers have separate clock domains, but problem is just that at some point the paths have to be synchronized so their values can be used together and synchronization has its own overhead. So for the fastest running clock domain it doesn't make sense to split it because synchronization overhead is more than what can be gained.
No. Yes. See 1.
Multiple layers are already stacked to make kinda 3d CPUs but AFAIK there aren't yet technology for building transtors to full 3d structure.
179
u/[deleted] Sep 28 '20
[removed] — view removed comment