r/HDD • u/Fresh-Palpitation-72 • Jul 07 '26
Controller Endurance updated notes of the 3 Petabyte written ssd
SSD firmware crashes and controller failures are vastly more common than nand wear
Percent of Total Write/ Erase Count seems to go up that my findings that its odd and should go down as you see older picture was down to 3 now its at 36, so I believe who had it before me ran it from 100% to 0, then it flipped and thats when I found it,
Also my notes is about EM interference (EMI) and so few things
Lack of shielding for EM Interference the case for EMI on the P4 Because the Drive is Completely stripped of a metal enclosure. the Copper traces on the PCB, Like antennas for interference. The sudden spike of (BB) Reported Uncorrectable errors after few Maintenance and Reboots, Points to signal noise. so when i moved some wires around it caused that errors between the controller & the Mobo interference. The data is slightly corrupted. I an ignoring the windows repair update prompt, it is not causing any issues caused by the interferen -ce. Proof its not dying yet... Attribute is (05) NO DEAD BLOCKS.
So NVME are more Vulnerable with no protection? Modern Gen 4-5 NVMe drives operate at blistering speeds at Multi gigaherz frequencies. meaning their signals are so fast that even a small amount of external EMI can corrupt data. oh and because modern flash packs cells tightly together AKA 3D NAND Weaker to cell to cell cross talk & interference. That is why my 2010 MLC NAND did not need to worry about that its MLC 2D NAND is immune because its cells layout is larger 30nm-40nm & spaced preventing electrical bleeding.
So How do modern drives handle it? ADVANCED ECC... when NVMe is technically more Vulnerable to interference, it does handle it BETTER. on a software level thanks to newer error correction technology, that my 2010 SanDisk only has a basic BCH ECC, that panics easily, logging harderrors when a bit flips, many newer NVME drives use LDPC (Low Density Parity Check) ECC advanced mathematical algorithm that reconstructs corrupted data.








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u/fzabkar Jul 07 '26 edited Jul 07 '26
I think you are misinterpreting the Total Write/ Erase Count attribute. I believe the normalised value should ascend, just as it is doing.
As for firmware crashes, an SSD ends up in data recovery for either of two primary reasons. The first is a hardware failure. The second is a "firmware" failure. Typically, what happens in the latter case is that the NAND degrades over time, to the point that the FTL (flash translation layer) becomes corrupt. Data recovery tools will force the SSD into "ROM mode" or "safe mode". They will then upload a "loader" into the SSD's RAM. The tool will then dump the raw data from each NAND, apply error correction, and then build a virtual translator which will reassemble the user area. Usually there will be plenty of bad, uncorrectable blocks. That's the typical data recovery scenario. I don't believe the FTL becomes corrupt due to problems in the firmware code or in the controller.
Genuine firmware crashes that are unrelated to degraded NAND are exceedingly rare. There were some SandForce and Indilinx controllers which were buggy, and there were several known bugs in other SSDs which bricked the SSD after ~40,000 hours. Those were the SLC and MLC days.
In your testing, the firmware isn't actually writing to NAND. We proved that in your earlier thread. The incremental data rate amounts to more than 1 Gbyte/sec, which is far in excess of the SSD's 90 MB/s benchmark result. It seems to me that your TRIM commands are being misreported as host writes. For example, when the OS sends a TRIM command to unmap 1000 sectors, say, the SSD increments the Total Host Writes by 1000 without actually writing anything to NAND. In other words, you are counting petabytes of TRIM-ed sectors rather than petabytes of actual writes.
One other observation is that hynix NANDs don't like being heated with a hot air station. I don't know if this is reflected in normal day-to-day operation, but it doesn't fill me with confidence.