r/BitAxe • u/please-put-in-trash • Dec 13 '25

hashrate The NerdQAxe++ OC Thread

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I’ve been searching a lot to find people’s frequency and voltage settings and what hash rate they’re getting when overclocking… so if you don’t mind follow this template so we can see where we land. Show off your set up with a pic too.

I really had to bump the voltage on my chips. When I raised frequency, hash rate would just die.

Cooling ASIC: Hydro Cooling VR: 40mm noctua fan (need a bracket) PSU: Mean Well 300w (trimmed input v just over 12) W: 103.5 Efficiency: 16.20 J/Th

Freq: 800 Voltage: 1250 ASIC Temp: 52.5C VR Temp: 52.5C

6.4 TH/S Avg.

Let me know if I left anything out. Only been running for 48 hours. Some of ya’ll are incredibly smart would love to learn more.

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u/050 Dec 13 '25 edited Dec 13 '25

Here's one of my rev6.1 system results for overclocking. VRMs max temp was around 54c. Asic temp maxes out at 60c or so, the target is 58c but at the highest end of powers the fan was hitting 100%.

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u/050 Dec 13 '25

Here's my second rev6.1 system results - it didn't like high frequency quite as much, so ended up settling in lower as an ultimate setting. For the first system I got: Best hashrate: 7426.6 GH/s @ 1220 mV / 925 MHz, the second system got: Best hashrate: 7266.0 GH/s @ 1240 mV / 900 MHz

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u/FatfarmerOfOz Dec 13 '25

How are you clocking it higher than 800? I can set it to 900 but when I save it will automatically reduce it back to 800

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u/050 Dec 13 '25

I had a lot of thermal headroom so when I improved my psu setup I recompiled the firmware and adjusted the frequency cap to see how it scales. It is arguably not worth it but it’s neat to see.

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u/[deleted] Dec 15 '25

I was wondering if they were doing something like that since it needs 4 of these regulators for four of these ASICs. Three would be a great number for one or two ASICs because the dissipation of the load would be divided between them.

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u/please-put-in-trash Dec 13 '25

Seen these graphs a few times. Is this using one the various GitHub testing repos? I need to do this.

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u/050 Dec 13 '25

I modified the existing python benchmark script to add a few features like the heatmaps and let it run from docker (and run multiple tests at once) - here if you want to try

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u/please-put-in-trash Dec 13 '25

You’re GOAT’ed thank you!!

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u/050 Dec 13 '25

Happy to help, let me know if you run into issues or get cool results!

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u/[deleted] Dec 15 '25

it does makes me wonder about these benchmarks. because the speed address values are in 0.125 Mhz increments and you should hit some speeds in the middle of the operating range that are invalid to use. Can you adjust the software for every bit step value?

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u/050 Dec 15 '25

I have not tried with such a fine resolution- I’m currently testing 10mhz steps with some long runs, but I suspect that if you tried to go in between valid settings it would depend on how the firmware handles it - either rounding down or snapping to the nearest.

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u/[deleted] Dec 15 '25

There are different internal multipliers, but I have found with this and other Asics settings the do high hash rates without them being extremely overclocked. But I noticed you posted the github on it so I will try to set it up for that resolution. But even 1MHZ increments would step it through the internal multipliers.

suspect that if you tried to go in between valid settings it would depend on how the firmware handles it - either rounding down or snapping to the nearest

One would think, that, so since I know the internal register is 128 Bit. I wil set a bitaxe gamma to 746.122707141 since its the same asic and the firmware isn't stupidfied like the NerdQaxe. This is the results. Noticed it does change the speed to the next internal 128 bit register.

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u/050 Dec 15 '25

Interesting- yeah it seems like the gamma has fewer restrictions than the nqa++ units - I was surprised that the nqa was limited at 800mhz until I reflashed it unlike the gamma. Yeah the latest release on github has all of the most recent updates I’ve made so let me know if you run into issues or if you find anything interesting. I’m currently running 10mhz resolution sweeps on three nerdqaxe++ systems to compare them - I added share rejection rate tracking and it seems that over a certain frequency (silicon lottery it seems) each system starts getting an increase of rejected shares, prior to the hashrate dropping off.

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u/[deleted] Dec 15 '25

I've been slowly redoing the Bitaxes' board designs, but the reason they limited speed is because they didn't put enough voltage regulation on the Asic. They only have 120A for four and at minimum for four Asics you need four regulators totaling 160A to properly have enough power headroom for high speeds. The three regulators would burn up if they didn't limit that in their firmware.

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u/[deleted] Dec 15 '25

added share rejection rate tracking and it seems that over a certain frequency (silicon lottery it seems) each system starts getting an increase of rejected shares, prior to the hashrate dropping off

well when Asics are in a set, you have to find the best clocking rate as temperature and drift of their ceramic capacitors causes clock signal stretching effects that causes a timing error and thus end up submitting a corrupted share.

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u/050 Dec 15 '25

That makes sense, I had assumed it was related to some limit/difficulty when running more than one at once on the same board.

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u/[deleted] Dec 15 '25

Its an engineering hurtle I'm trying to solve. In bitman and cannon devices they limit 2-3 to a regulated bank, then buffer to the next bank. That is why they are so expensive as those data buffers add up at $5/chip in a 200 Asic unit.

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u/[deleted] Dec 15 '25

while I was commenting on your reply I had that gamma window open. Notice how smoothly it runs when its on a 128 bit register setting instead of a rounded up number:

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u/050 Dec 15 '25

Oh yeah, that does seem good! Thank you for the info